library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;

entity t_bird_hand is
port(
  turn	: in std_logic_vector(1 downto 0);
  left_lights	: out std_logic_vector(2 downto 0);
  right_lights	: out std_logic_vector(2 downto 0);
  clk	: in std_logic;
  reset	: in std_logic;
  vss	: in std_logic;
  vdd	: in std_logic
);
end t_bird_hand;

architecture RTL of t_bird_hand is

  signal rtl_std_logic_vector_0	: std_logic_vector(3 downto 0);
  signal current_state	: std_logic_vector(3 downto 0);
  signal n3	: std_logic;
  signal n2	: std_logic;
  signal n1	: std_logic;
  signal n0	: std_logic;
  signal p3	: std_logic;
  signal p2	: std_logic;
  signal p1	: std_logic;
  signal p0	: std_logic;

begin
  rtl_std_logic_vector_0 <= (n3 & n2 & n1 & n0);
  right_lights(0) <= ( );               -- insert your combination of current
                                        -- state bits, ie p0, p1,p2,p3
  right_lights(1) <= ( );
  right_lights(2) <= ( );
  left_lights(2) <= ( );
  left_lights(1) <= ( );
  left_lights(0) <= ( );

  process ( clk )
  begin
    if  ((clk = '1') and clk'event)
    then current_state <= rtl_std_logic_vector_0;
    end if;
  end process;

  n0 <= (reset and ( );                 -- insert your sum of products
  n1 <= (reset and ( );
  n2 <= (reset and ( );
  n3 <= (reset and ( );
         
  p0 <= current_state(0);
  p1 <= current_state(1);
  p2 <= current_state(2);
  p3 <= current_state(3);

  end RTL;