#include #include "genpat.h" char *inttostr(entier) int entier; { char *str; str = (char *) mbkalloc (32 * sizeof (char)); sprintf (str, "%d",entier); return(str); } main () { int vect_date = 0; /* this date is an absolute date, in ps */ int i,j,k; /* loop counter variables */ DEF_GENPAT("rs_controller_in"); SETTUNIT("ns"); /* set up the interface declarations */ /* name, white_space, format, mode , size, option */ DECLAR("vdd",":0","B",IN,"",""); DECLAR("vss",":2","B",IN,"",""); DECLAR("reset",":0","B",IN,"",""); DECLAR("clk",":2","B",IN,"",""); DECLAR("instruction_reg",":2","X",IN,"(7 downto 0)",""); DECLAR("z_flag",":2","B",IN,"",""); DECLAR("ar_inc",":","B",OUT,"",""); DECLAR("pc_inc",":","B",OUT,"",""); DECLAR("ar_load",":","B",OUT,"",""); DECLAR("pc_load",":","B",OUT,"",""); DECLAR("dr_load",":","B",OUT,"",""); DECLAR("tr_load",":","B",OUT,"",""); DECLAR("ir_load",":","B",OUT,"",""); DECLAR("r_load",":","B",OUT,"",""); DECLAR("ac_load",":","B",OUT,"",""); DECLAR("z_load",":","B",OUT,"",""); DECLAR("mem_bus",":","B",OUT,"",""); DECLAR("bus_mem",":","B",OUT,"",""); DECLAR("pc_bus",":","B",OUT,"",""); DECLAR("dr_h_bus",":","B",OUT,"",""); DECLAR("dr_l_bus",":","B",OUT,"",""); DECLAR("tr_bus",":","B",OUT,"",""); DECLAR("r_bus",":","B",OUT,"",""); DECLAR("ac_bus",":","B",OUT,"",""); DECLAR("alus",":","B",OUT,"(6 downto 0)",""); DECLAR("read_m",":","B",OUT,"",""); DECLAR("write_m",":","B",OUT,"",""); /* insert a label in the pattern file */ LABEL( "reset"); /* AFFECT( date, name, value) */ /* set up the inital values for the inputs and outputs. */ AFFECT("0", "vdd", "0b1"); AFFECT("0", "vss", "0b0"); AFFECT("0", "reset", "0b0"); /*power-on reset assumes active low logic*/ AFFECT("0", "clk", "0b0"); AFFECT("0","instruction_reg","0x00"); AFFECT("0","z_flag","0b0"); AFFECT("0", "ar_inc","0b*"); AFFECT("0", "pc_inc","0b*"); AFFECT("0", "ar_load","0b*"); AFFECT("0", "pc_load","0b*"); AFFECT("0", "dr_load","0b*"); AFFECT("0", "tr_load","0b*"); AFFECT("0", "ir_load","0b*"); AFFECT("0", "r_load","0b*"); AFFECT("0", "ac_load","0b*"); AFFECT("0", "z_load","0b*"); AFFECT("0", "mem_bus","0b*"); AFFECT("0", "bus_mem","0b*"); AFFECT("0", "pc_bus","0b*"); AFFECT("0", "dr_h_bus","0b*"); AFFECT("0", "dr_l_bus","0b*"); AFFECT("0", "tr_bus","0b*"); AFFECT("0", "r_bus","0b*"); AFFECT("0", "ac_bus","0b*"); AFFECT("0", "alus","0b*******"); AFFECT("0", "read_m","0b*"); AFFECT("0", "write_m","0b*"); /************************************ * * Allow everything to settle on power up * ************************************/ for (i = 0; i < 30; i++) { vect_date += 125; if(i%2) AFFECT(inttostr(vect_date), "clk", "0b0"); /* %2 toggle clock on even/odd value of i */ else AFFECT(inttostr(vect_date), "clk", "0b1"); } AFFECT(inttostr(vect_date), "reset", "0b1"); /* Reset inactive */ /******************************************************** * * start testing op-codes. Remember to give the correct * number of clock cycles for each opcode. * ********************************************************/ LABEL( "NOP"); AFFECT(inttostr(vect_date),"instruction_reg","0x00"); for (i = 0; i < 8; i++) /*make sure you understand why this is 8 */ { vect_date += 125; if(i%2) AFFECT(inttostr(vect_date), "clk", "0b0"); else AFFECT(inttostr(vect_date), "clk", "0b1"); } LABEL("LDAC"); AFFECT(inttostr(vect_date),"instruction_reg","0x01"); for (i = 0; i < 16; i++) { vect_date += 125; if(i%2) AFFECT(inttostr(vect_date), "clk", "0b0"); else AFFECT(inttostr(vect_date), "clk", "0b1"); } LABEL("STAC"); AFFECT(inttostr(vect_date),"instruction_reg","0x02"); for (i = 0; i < 16; i++) { vect_date += 125; if(i%2) AFFECT(inttostr(vect_date), "clk", "0b0"); else AFFECT(inttostr(vect_date), "clk", "0b1"); } LABEL("JMPZN"); /* zero flag = 0 */ AFFECT(inttostr(vect_date),"instruction_reg","0x06"); for (i = 0; i < 10; i++) { vect_date += 125; if(i%2) AFFECT(inttostr(vect_date), "clk", "0b0"); else AFFECT(inttostr(vect_date), "clk", "0b1"); } LABEL("JMPZY"); /* zero flag = 1 */ AFFECT(inttostr(vect_date),"z_flag","0b1"); for (i = 0; i < 16; i++) { vect_date += 125; if(i%2) AFFECT(inttostr(vect_date), "clk", "0b0"); else AFFECT(inttostr(vect_date), "clk", "0b1"); } AFFECT(inttostr(vect_date),"z_flag","0b1"); /* clear the zero flag again */ SAV_GENPAT(); }